System for radar positional data



Jan. 16, 1962 A. G. VAN ALsTYNE UA1. 3,017,105

SYSTEM FOR RADAR PosIToNAL DATA 4 Sheets-Sheet l l Filed July 14, 1955 .N @LA INVENTORS. Al z//A/ G04/ Wu asn/ME Jan. 16, 1962 A. G. VAN ALsTYNE ETAL 3,017,105

SYSTEM FoR RADAR PosmoNAL DATA 4 Sheets-Sheet 2 Filed July 14, 1955 Jan. 16, 1962 A. G. VAN ALSTYNE ETAL 3,017,105

SYSTEM FoR RADAR PosIToNAL DATA Filed July 14, 1955 4 Sheets-Sheet 5 Jan. 16, 1962 A. G. VAN ALSTYNE ET AL 3,017,105

SYSTEM FOR RADAR POSITIONAL DATA 4 Sheets-Sheet 4 Filed July 14, 1955 3,017,105 SYSTEM FR RADAR POSTIONAL DATA Alvin Guy Van Alstyne and Garvin M. Moore, Jr., Los Angeles, Calif., assignors to Giiillan Bros. Inc., Los Angeles, Calif., a corporation of California liiied July 14, i955, Ser. No. 521,965 14 Claims. (Cl. 23S-136) This invention relates to coordinate translation devices and more particularly to a device for ltranslating the coordinates of a point based upon a first set of reference axes into coordinates based upon a second set of reference axes.

While the system of the present invention may have many applications in various fields, it has been found to be particularly useful in the translation of radar positional data or polar coordinate data from other types of object locating devices. For examples, it is at present the practice to guide `an aircraft to a point remote from a shipboard radar scanning station by obtaining the range and bearing of the aircraft with respect to the ship from the ships radar. At the ship the range and bearing of the aircraft are translated into the polar coordinates of the aircraft with respect to the remote point or entry gate which is the origin of translation of the coordinates, the ship being the initial origin. The translated coordinates are then transmitted to the aircraft to guide it to the entry gate.

It is generally necessary to employ a coordinate translation device which will compute the translated coordinates of the aircraft at a rather high speed and with considerable accuracy because in certain radar positional data systems, data is made Iavailable to, or sampled for the coordinate translation device periodically for a length of time thatlis small compared to the data sampling period. l

Servo mechanisms have been employed in the past to produce a translation of the polar coordinates of an aircraft with respect to a ship into the aircrafs coordinates with respect to an entry gate. However these servo mechanisms generally incorporate electro-mechanical elements which lack thel required speed of response.

Alternatively, phase-amplitude analog coordinate translation systems have been employed in the past because of their instantaneous responses. In this type of system the amplitude of an alternating signal is employed to represent the magnitude of a polar distance and the phase of the signal is employed to represent a corresponding polar angle. Various operations are then performed on the phase and amplitude of the voltage to produce an output bvoltage having a phase and amplitude proportional to translated polar angle and distance coordinates, respectively.

ln these phase-amplitude analog coordinate translation systems it is generally required that a nearly perfect sine Wave be employed throughout, ie., a signal without harmonic distortion. However, most computing elements are inherently nonlinear and some harmonics are generated. These harmonics then restrict the accuracy of the system, so that they have not performed satisfactorily for accurate aircraft guidance.

The present invention overcomes the above and other limitations of previously-known coordinate translation systems by providing a system wherein high-speed cornputation may be effected through directly-coupled computing components.

This high-speed computation is made possible through a novel means of coordinate translation where rst and second reference signals are produced that are proportional to a common parameter; the iirst reference signal being based upon the initial coordinates of the target, and the second reference signal being based upon the translated coordinates.

These first and second reference signals then are compared to produce an output error signal which also constitutes one of the unknown parameters in the translated coordinate system. The error signal then is fed back to the means providing the second reference signal and results in a system stabilization in a state where the parameter computed on the basis of the translated coordinates is equal to the parameter computed on the basis of the initial coordinates.

This general technique of separate parameter computation, comparison for error-signal generation, and feedback for correction is compatible with all electronic direct-current analog translation instrumentation so that the entire computing and feedback arrangement may operate substantially instantaneously thereby obviating the disadvantages of the inertial effects of electro-mechanical servo mechanisms.

Furthermore, the approach of the invention allows a degree of accuracy which is limited only by the particular analog components employed, the feedback arrangement insuring that the system itself does not introduce significant further errors.

In a specic aspect of the invention, the sum and difference of the initial polar and Cartesian coordinates of a point with respect to a given initial tign are computed and the product taken of that sum and difference. Similarly the product of the sum and difference of the translated polar and Cartesian coordinates of the point with respect to an origin of translation are taken. In order to facilitate the computations of the products in each of these cases, the mean difference of a polar distance and Cartesian coordinate is first taken and then added to a signal proportional to the Cartesian coordinate. The addition of the Cartesian coordinate to the mean difference thus produces a mean sum which may be, in turn, multiplied by the mean difference to provide an output signal proportional to one-fourth the difference of the squares of the polar distance coordinate .and the Cartesian coordinate. In this aspect of the invention the use of an additional inverter or adder is obviatedl.

It is, therefore, an object of the invention to provide improved coordinate translation system requiring a minimum of component parts.

It is another object of the invention to provide a highly accurate translation system.

It is still another object of the invention to provide a coordinate translation analog system having a high speed of response.

These and other objects and advantages of the present invention will be better understood when considered with the following description taken in connection with the accompanying drawings made a part of this specification, wherein several embodiments are illustrated by way of example. The device for the present invention is by no means limited to the specic embodiments illustrated in the drawings since they are shown merely for purposes of description.

FIG. l is a block diagram of an embodiment of the coordinate translation system of the present invention;

FIG. 2 is a plan position view of a ship and aircraft and an entry gate;

Y FIG. 3 is a plan view of ya coordinate system including the origin of a ship and the origin of translation of an entry gate and an aircraft position;

FIGS. 4a and 4b are partial schematic diagrams of a more specific embodiment of the present invention as shown in FIG. 1; and

FIG.- 5 is a block diagram of an alternative embodir'nent of the invention.

A computer is shown in FIG. l comprising an input source 10, a first parameter computer 100 responsive to the output signals of the signal source for producing a function f1(m). A second yparameter computer 261i responsive to the input signal m is then employed to produce a function f2(m,n) which is compared in a comparison device i110` with 1(m) to give an output signal n, to which the second parameter computer 200 is made responsive. From a composite output signal m of input source 10, the circuit of FIG. 1 then provides a composite output signal n which is produced by a comparison of the function f1(m) and the function f2(m,n).

The yutility of the computer of FIG. l may be better understood by reference to a specific application to that circuit.V This is illustrated in the drawing in FIG. 2 where an aircraft position is denoted by A, an origin of a radar detection station is indicated by H, and an origin of ltranslation is indicated by E. The same three designations lare employed in a graphical representation in FIG. l3. Polar' coordinates which are known are, therefore,

the distance HA as denoted by R and the polar angle coordinate 0 or the angle EHA shown in FIG. 3. Polar coordinates to be computed are the length of the line EA or R1 and the polar angle coordinate 01 which is the supplement of the angle HEA. If y is employed to indicate the distance between A and the line passing through H and E, and x is employed to indicate the distance between -H and the line through A perpendicular to the line passing through HE., then i912: (R1i'11)(R1-fv1) where y1 is y computed in a different way.

VUse of the above relationships is not necessarily employed `with the computer of the present invention; however, .coordinate translation may be efciently accomiplished when .the computation is made according to the above-described procedure, and therefore it is preferred.

A specific embodiment of the computer of the present invention is shown partially in block diagram form and partially in schematic in FIGS. 4a and 4b where input source 10 is shown with computers 100v and 260 and comparison circuit 300. Additionally shown in FIG. 4a are three output terminals 11, 12, 13 of input source 10 at which terminals direct-current voltages are produced that are proportional to aircraft range, R, the distance between the initial origin and the entry gate of the aircraft, R0, `and the bearing of the aircraft, 0, respectively. Also shown are a divider 400, an arccosine function generator 500, angle polarity control means 600, and a utilization device 700. Input source 10 is connected to a irst parameter computer 4100 and a second parameter computer 200.

First parameter computer 100 computes function f1(m) which may be proportional to a parameter common to the given set of polar coordinates R,0 and the polar coordinates of translation R161 to be computed. For example, f1(m) may be proportional to the actual distance y shown in FIG. 3 or the actual distance x1. 'Second parameter computer 200` then computes a second 'function f2(m,n) which corresponds to the same parameter. The exact value of the parameter is indicated by f1(m) whereas an approximate value is indicated by f2(m,n) which is based upon the magnitude of a computed value of one of the polar coordinates which may also be R1 or 01.

Comparison circuit 300 is shown connected to both iirst parameter computer and second parameter computer 200 for comparing the values of the functions f1(m) and f2(m,n) to produce a voltage proportional to R1 or 61 by means of a high gain ampliiier the bias on which may be changed by the appearance of a difference voltage between voltages representing the parameters m1 and m2. In order that second parameter computer 200 may compute f2(m,n) on the basis of the computed value of R1 or 01, the output side of comparison circuit 300 is accordingly connected to second parameter computer 200 which operates to produce the function f2(m,n) in response to the output signals of comparison circuit 300 and input source 10.

The specific embodiment of the invention as shown in FIGS. 4a and 4b includes first parameter computer 100 having cosine function generator means connected from terminal 13 of input source 10l to a polarity inversion multiplier 120, which also has a connection 11. Both cosine function generator means 110 and polarity inversion multiplier may be included in either the first parameter computer 100 or the second parameter computer 200. A mean sum adder is then connected from polarity inversion multiplier 120 and from terminal 11 of input source 10. An adder 140 is connected from polarity inversion multiplier 120 and mean sum adder 130 to produce an output signal proportional to R -I-x JF( 2 which is impressed with the output of mean sum adder 130 on a polarity inversion multiplier 150. An adder 210 in computer 200 is connected from terminal 12 and polarity inversion multiplier 129. Adder 210 then is connected to a polarity inverter 220 which is connected to a mean sum adder 230. An adder 246` is connected from the output of inverter 220 and from the output of mean sum adder 230 to a constant polarity multiplier 250 which also receives the output signal of mean sum adder 230. The outputs of polarity inversion multipliers and 250 are then impressed upon a summing circuit 310 in comparison circuit 360. Comparison circuit 300 also includes an amplifier 300A connected from the output of summing circuit 310. The output of amplifier 300A is connected both to utilization device 700 and to mean sum adder 231D.

The output of amplifier 300A is the computed polar distance coordinate R1. The polar angle coordinate 01 may be obtained by dividing x1 by R1 to obtain cos 01 whereby 61 may be obtained. This is accomplished through divider 400 which is connected from polarity inverter 221B and the output of comparison circuit 300 to arccosine function generator 500. Angle polarity control means 600 is connected from arccosine function generator 500 to utilization device 700, whereby an output voltage may be provided which is the positive or negative absolute value of 01 or equal to 01. Summarily the operation of the translation computer shown in FIG. 4 is the. computation of the product of whereby the actual value of is obtained and added to is compensated by a change in the output of the high gain amplier 306A. The mean sum and difference of R,x and Rbxl are computed in order to Obviate the necessity of using an inverter amplifier.

The particular translation computer of the present invention shown in FIG. 4 operates as follows: cosine function generator means 110 produces the cosine function of 0, the cosine function generator means 110 being connected to the terminal 13 of input source 10. Cos 0 is then multiplied by R by polarity inversion multiplier 120 which is connected to terminal r11 and to cosine function generator means 110. The output voltage of polarity inversion multiplier 120` is thus proportional to xR cos 0 because of its polarity inversion characteristic which is well known in the art. Mean sum adder 131i adds R to -x .since it is connected to terminal 11 and to the output side of polarity inversion multiplier 120 and takes the mean sum in a Well known manner as will be later described. The output of means sum adder 130 is then Adder 140 adds -x to the output of mean sum adder 130 to arrive at an output voltage proportional to arrive at which is the output of polarity inversion multiplier 150. Comparison circuit 300 compares the output of constant polarity multiplier 251i, which is and the output of polarity inversion multiplier 150, which is to arrive at a computed value of R1 at the output side of amplifier 300A which is fed back to means sum adder 230. Adder 211i, connected from terminal 12 and from polarity inversion multiplier 120, computes -x-i-Ro and inverts the polarity of the sum as indicated at the output of the adder 216 as -l-Xl. The output of adder 210 is then itself inverted to obtain -x1. x1 is added to R1 by means sum adder 232i which takes the mean sum of Rl-xl to obtain 6 Adder 240 connected from polarity inverter 226i and mean sum adder 230 then adds With polarity inversion. Constant polarity multiplier 250 when biased properly, as well known in the art, may

produce (Ri +3J1 R1 *1191 2 2 +112 M 4 and 4 to obtain The sum of a polarity inversion being conventional. +01 is obtained by arccosine function generator 500 in a well known manner and angle polarity control means 61N) provides an output signal proportional to 01 and also the negative and positive of the absolute value of 01 by means which will be explained hereinafter.

In FIG. 4 cosine function generator means 11i), which is only capable of operating with positive values of 6, is shown in more detail comprising a cosine function generator 111 and a constant polarity circuit C112. Constant polarity circuit 112 comprises a well known combination including four diode rectifiers y112D1, 112D2, 112133 and 112D4 and an amplifier 112A which is provided with a feedback resistor 1112111 and a series resistor 11.2112 which is connected to the 0terminal 13 of input source 1d. Series resistor 112R2 is connected directly from terminal 13 to amplifier 112A across which feedback resistor 112R1 is connected. Rectifier 112D1 is connected from terminal 13 to cosine function generator 111 to isolate terminal 13 from a lead 113 of the function generator 111 when 0 is negative, the anode of rectifier 112D1 being connected to terminal 13 and the: cathode of rectifier 112D1 being connected to lead 113. Rectifier 112D4 is connected from amplifier 112A to cosine function generator 111 to isolate the amplifier 112A from lead 113 when 0 is positive, the anode of rectifier 112D@ being connected to amplifier 112A and the cathode of rectifier 112D4 being connected to lead 113.

As is conventional with cosine function generators, it is necessary to provide a voltage proportional to both the positive and negative values of the absolute value of an angle. Accordingly -I0| is provided by the rectifiers 112D2 and 112D3 which have their anodes connected to a lead 114 of cosine function generator 111. Rectifier 112D2, having its cathode connected to terminal 13, isolates terminal 13 from lead 114 when 0 is positive. Rectifier 112D3, having its cathode connected to amplifier 112A, isolates amplifier 112A from lead 114, when 0 is negative.

All of the adders 210, 14d and 246 comprise simply an amplifier with an appropriate summing circuit and feedback resistor as shown, for example, with respect to the adder 210 which comprises summing resistors 210121 `and 210R-2, amplifier 210A and feedback resistor 210R3.

The mean sum adders 130 and 230 are identical.y Mean sum adder 130, for example, comprises two sum-l ming resistors l130R1 and 130R2, an amplifier 130A and a feedback resistor 130R3 having a resistance equal to one-half that of summing resistors 130R1 and 130R2. Summing circuit 310 simply comprises two summing resistors 3-10R1 and 310112.

Divider 400 comprises a well known circuit including a constant polarity multiplier 410, summing resistors 400R1 and 400112 and an amplifier 400A. Arccosine function generator 500 `likewise comprises a Well knownI combination of conventional elements including a volt` age biasing resistor 500R1, summing resistors 500R2 and 500R3, a cosine function generator 510, an amplifier 500A, an amplifier feedback resistor 500R4, and a polarity inverter 520 including a series resistor 520'R1, an amplifier 520A and a feedback resistor 520R2, polarity inverter 520 being identical to polarity inverter 220. The output of amplifier 500A thus provides cosine function generator 510 with the value -l-lll and the output of amplifier 520A provides cosine function generator 510 with` the value -]61l.

Angle polarity control means `600 comprises a relay 610 having a first terminal 611 and a Second terminal 612 which are connected from the arccosine function generator 500. An output terminal 613 is provided for relay 610 from which an output of +|01| may be taken. 01- may be taken from the first terminal 611 whereas ||01[' may be taken from second terminal 612. A contact arm 614 is pivoted at output terminal 6,13 and normally connects second terminal 612 to output terminal 6 13.

When the polarity of 6 at terminal 13 of input source 10 is negative, it is necessary to energize relay 610 toy cause the contact arm 614 to pivot downward to connect second terminal 611 to output terminal 613 whereby +01 may still be produced. To this end a polarity reversal control circuit 620 is provided comprising a series resistor 620R1, an amplifier 620A having two rectifiers 620D1 and 620D2 connected in parallel therev across, and two resistors 620R2 and 6270113. Rectifier 620D1 is connected directly in parallel with amplifier 620A to maintain the output of amplifier 620A at a relatively low positive or negative potential when 0, at terminal 13 is positive. Relay 610 will not then be energized. Accordingly the anode of rectifier 620D1 is c onnected to the input side of amplifier 620A. The cathode: of rectifier 6 20D2 is connected from the input side of amplifier 620A and resistor `620R3 is connected from A.the anode of rectifier 620D2 to the output side of amplier 620A. The rectifier 620132 is biased negatively through resistor 620R2 which is connected from the anode of rectifier 620D2 to a negative source of potential. When at terminal 13 becomes negative, amplifier 620A produces a relatively high positive output voltage which energizes relay 610. The amplifier 620A thus should have a relatively high gain. When such is the case, relay 610 may be overloaded. 'For this reason a feedback path through rectifier 620D2 is provided for the amplifier 620A. The feedback path thus becomes operative when the positive output voltage of amplifier 620A overcomes the negative bias on rectifier 620132.

All the amplifiers shown in FIG. 4 are well-known in the art and may be chopper-stabilized direct-current amplifiers such as those described on pages 200-210 of Electronic Analog Computers, Korn and Korn, 1952 (Mc- Graw-Hill). The multipliers shown in FIG. 4 should be four-quadrant multipliers as described on page 212 of the above cited reference and the cosine function generators of FIG. 4 are preferably of the biased diode type described on pages 2714-2719 of the Korn and Korn book.

and compares those quantities using a difference voltage to produce R1 from which 01 may be computed. `Of course, alternative methods of computation may be employed sby altering this preferred method without departing from the scope of the present invention. For example, y may be computed and x1 may be computed as R cos .f2-R0, x12, ie. x1 computed in a different way, may be computed as y cot 01 using a calculated value of 01. The quantities (R cos (9e-RO) and (y cot 61) may then be compared to produce 01. Such an embodiment of the present invention is shown in vblock diagram form in 5. i

Input source 10 is shown in FIG. 5 with first parameter computer 100, second parameter computer 200, comparison circuit 300, and utilization device 700 connected in the Asaine manner as they are shown connected in FIG. l. First parameter computer in FIG. 5 comprises a cosine function generator 1,000 which is connec'ted yto the `(-terminal 13 of input source 10 to produce an output signal proportional to cos 6. First parameter computer 100 also includes a polarity inversion multiplier 1100 and an adder 1200. The polarity inversion multiplier 1100 is connected from the R-termina111 of input source 10 and from'cosine function generator 1,000 to adder 1200 for computing the product R cos 0 to which R0 is added in adder 1200 to produce an output signal proportional to x1. Comparison circuit 300 shown in FIG. 5 may be exactly the same as that shown in FIG. 4 with summing circuit 310 and amplifier 300A.

Second parameter computer 200 in FIG. 5 comprises a sine function generator 2,000, a polarity inversion multiplier 2100, a cotangent function generator 2200, and a constant polarity multipler 2300. Sine function generator 2,000 is connected from the -terminal 13 of input source 10 to polarity inversion multiplier 2100 to supply polarity inversion multiplier 2100 with a signal proportional to the sine of 0. Sin 0 is then multiplied by R in polarity inversion multiplier 2100 to give an output signal proportional to R sin 0. Constant polarity multiplier 2300 is connected from polarity inversion multiplier 2100 and cotangent function generator 2200 to summing circuit 310 of comparison circuit 300. The output signal of comparison circuit 300, which is chosen to be 91, is introduced to utilization device 700 and cotangent function generator 2200 of second parameter computer 200. The output signal of comparison circuit 300 is introduced to a cosecant function generator 3,000 which is, in turn, connected to a multiplier 4,000, multiplier 4,000 being connected to utilization device 700.

The general operation of the invention as shown in FIG. 5 is identical to that described in relation to the block diagram illustrated in FIG. l. The embodiment of the invention shown in FIG. 5, however, differs from that shown in FIG. 4 in that the parameter compared in comparison circuit 300 in FIG. 5 is the parameter x1, the computed value of which is indicated by x12. A difference between x1 and -Ixlzl is thus detected by comparison circuit 300 which then produces an output signal proportional to 61 in response to the existence of such a dlfference. x12 is computed in a straight-forward manner, i.e., cot 01 is produced by cotangent function generator 2200 and this is, in turn, multiplied by -R sin 0 by constant polarity multiplier 2300 to give [xlzl.

R1 is computed and fed to utilization device 700 in the following manner. The cosecant of 91 is produced 9 by cosecant function generator 3,000 in response to the input signal proportional to 01. x1 which is the accurate value of the distance indicated in FiG. 3 is then multiplied by csc 61 by multiplier 4,000 to produce an output signal proportional to R1.

In particular, the operation of the embodiment of the invention shown in FIG. 5 is as follows: cosine function generator 1,000 in rst parameter computer computes cos 0. Polarity inversion multiplier 1100, responsive to signals proportional to R and cos 0, then produces an output signal proportional to the product -R cos 0 which is added to R0 in adder 1200 to give x1 after an appropriate conventional polarity inversion is produced. It is obvious from FIG. 3 that the mathematical relationship between x1, R, Ro and 0 is as follows: x=R cos H, therefore, x1=xR0=R cos @-RU.

Second parameter computer 200 computes x12 in the following manner: sine function generator 2,000 produces an output signal proportional to sin 0. R is multiplied by sin 0 in polarity inversion multiplier2100 and gives an output signal proportional to -R sin 6. The output signal of comparison circuit 300 is selected to be proportional to 01. On the basis of this computed value the function cot 01 is then produced by cotangent function generator 2200. Cot 01 is then multiplied by -R sin 0 in constant polarity multiplier 2300 to give an output signal proportional to -x12.

It is evident from FIG. 3 that this is true because y=R sin H; therefore, x12=y cot 61=R sin 0 cot 01.

R1 is fed to utilization device 700 by multiplier 4,000 which obviously computes the product x1 csc 61 which equals R1. x1 in this case is thus provided by the output signal -of trst parameter computer 100 and csc 01 is provided by cosecant function generator 3,000 which is responsive to the output signal of comparison circuit 300,

the output signal of comparison circuit 300 being proportional to the polar angle coordinate 01.

What is claimed is:

l. A coordinate translation system for producing an output signal proportional to at least one polar coordinate of a point with respect to a given origin of translation in response to signals proportional to the polar coordinates of the point with respect to a given initial origin, said translation system comprising means responsive to the input signals for producing a iirst reference signal proportional to a variable common to each of the coordinate systems, means responsive to said input signals and said output signal for producing a second reference signal proportional to said common variable, and means responsive to said iirst and second reference signals for producing said output signal.

2. In combination in a coordinate translation system for producing output voltages proportional to the translated polar coordinates of a predetermined point with respect to a given origin of translation from a given set of polar coordinates of the point with respect to a given initial origin, the translation system incorporating an input source for supplying input voltages proportional to the given set of coordinates and the distance between the origins; means responsive to the input voltages for computing a first reference voltage proportional to the actual distance between the predetermined point and a line passing through both of the origins using the given set of polar coordinates, means responsive to the input voltages and one of the output voltages for computing a second reference voltage proportional to said distance using the computed values of the translated polar coordinates, and means for correcting any error in said computed values of the translated polar coordinates in response to the production of a difference of potential between said first and second reference voltages.

3. A coordinate translation system for producing output voltages proportional to the translated polar coordinates R1, 01 of a predetermined point in a plane of reference with respect to a given origin of translation disposed at a distance R0 from a given initial origin, said polar coordinates of said predetermined point with respect to said initial origin being R and 9, said translation system comprising first means for producing input Voltages proportional to R0, R and 0, second means responsive to the input voltages for computing a rst reference voltage proportional to the actual distance between the predetermined point and a line passing through both of the origins using the given set of polar coordinates, third means responsive to the input voltages and one of the output voltages for computing a second reference voltage proportional to said distance, and fourth means for correcting any error in said computed values of the translated polar coordinates in response to the production of a dierence of potential between said first and second reference voltages.

4. The invention as defined in claim 3, wherein one of said first and second means includes means for cornputing the product R cos 0=x, said rst means including means for computing the product crucis-t said second means including means for computing the il/il2 product (Rr-wlXR-ta) drt/lijf 4 4 5. The invention as defined in claim 3, wherein an input source is provided for producing input voltages proportional to R, R0 and 0 at R-, RD- and 0- terminals, respectively; one of said Iirst and second means includes cosine function generator means connected from said 0- terminal to produce an output voltage proportional to the function cos ll; one of said rst and second means includes a iirst polarity inversion. multiplier connected from said R terminal and said cosine function generator to produce an output voltage proportional to the product R cos 9=xg said lirst means includes a iirst mean sum adder connected from said R- terminal and said first polarity inversion multiplier to produce an output voltage proportional to the mean sum Ms-u a first adder connected from said first polarity inversion multiplier and said first mean sum adder to produce an output voltage proportional to the mean sum R-l-:c if( 2 and a second polarity inversion multiplier connected from said rst mean sum adder and said rst adder to produce an output voltage proportional to the product and said second means includes a second adder connected from said Roterminal and said first polarity inversion multiplier to produce an output voltage proportional to the difference x-R=x1, a polarity inverter connected from said second adder to produce an output voltage proportional to -x1, a second mean sum adder connected from said second adder and said polarity inverter to produce an output voltage proportional to the a third adder connected from said polarity inverter and said second mean sum adder to produce an output voltage proportional to the mean sum was and a constant polarity multiplier connected from said second mean sum adder and said third adder to said summing circuit to produce an output voltage propertional to the product (RFxi RVi-1v1) whereby said summing circuit and said amplifier may produce the polar distance coordinate R1 in proportion to the magnitude of the difference 6. The invention as defined in claim 3, wherein a divider is connected from said second and third means to produce an output voltage proportional to the ratio fv-l--arccos 01 and an arccosine function generator is connected from said divider to provide an output voltage proportional to +|0| and 101.

7. The invention as defined in claim 6 wherein angle polarity control means are connected from said arccosine function generator to produce an output voltage proportional to +01.

8. The invention as defined in claim 7, wherein said angle polarity control means comprises a polarity inverter connected from said arccosine function generator, a relay having first, second and output contacts, said first contact being connected to said polarity inverter, said second contact being connected to said arccosine function generator, said relay having a movable contact arm pivoted at said output terminal and connected between said output terminal and said first contact of said relay when said relay is not energized, and means connected to said 0-terminal for energizing said relay to produce a voltage at the output terminal of said relay proportional t-o +01.

9. In a coordinate translation system for producing an output voltage proportional to at least one of the translated polar coordinates R1 and 01 of a point with respect to an origin of translation at the intersection of a pair of translated rectangular coordinate axes x1 and y1 in response to input voltages proportional to the polar coordinates R, 0 of the point with respect to an initial origin at the intersection of a pair of initial rectangular coordinate axes x, y and an input voltage proportional to the distance R0 between said origins, the combination cornprising: first means responsive to only the input voltages for producing a first reference voltage proportional to one of the rectangular coordinates of said point with respect to said translated rectangular coordinate axes, second means responsive only to two of said input voltages and to a voltage proportional to only one of the translated polar coordinates of said point for producing a second reference voltage proportional to said one translated rectangular coordinate, and third means for comparing said first and second reference voltages to produce an output voltage proportional' to said one translated polar coordinate, said third means including fourth means to subtract one of said reference voltages from the other and an amplifier responsive to the output of said fourth means for producing said output voltage and impressing it upon said second means, said one translated rectangular coordinate being y1. v d

l0. In a coordinate translation system for producing an output voltage proportional to at least one of the translated polar coordinates R1 and 01 of a point with respect to an origin of translation at the intersection of a pair of translated rectangular coordinate axes x1 and y1 in response to input signals proportional to the polar co5 ordinates R, 0 of the point with respect to an initial origin at the intersection of a pair of initial coordinate axes x, y and an input voltage proportional -to the distance R0 between said origins, the combination comprising: first means responsive to only the input voltages for producing a first reference voltage proportional to one of the rectangular coordinates of said point with respect to said translated rectangular coordinate axes, second means responsive only to two of said input voltages and to only one of the translated polar coordinates `of said point for producing a second reference voltage proportional to said one translated rectangular coordinate, and third means for comparing said first and second reference voltages to produce an output voltage proportional to said one translated polar coordinate, said third means including fourth means to subtract one of said reference voltages from the other and an amplifier responsive to the output of said fourth means 4for producing said output voltage and impressing it upon said second means, said one translated rectangular coordinate being x1.

l1. The invention as defined in claim l0, wherein said first means includes a cosine function generator for producing an output voltage proportional to cos 0, a polarity inversion multiplier for producing an output voltage proportional to -R cos 0 and an adder for summing RO-R cos 0=x1, and said second means including a sine function generator for producing an output voltage proportional to sine 0, a polarity inversion multiplier for producing an output voltage proportional to -R sin 0, a constant polarity multiplier `for producing an output volt` age proportional to Ix12I=R sin 0 cot 01, and a co-tangent function generator for producing an output voltage proportional to cot 01 in proportion to the output voltage amplitude of said third means, said output voltage ampli tude of said third means being proportional to 01.

l2. In a coordinate translation system for producing an output signal proportional to at least one of the translated polar coordinates of a point With respect to an origin of translation at the intersection of a pair of translated rectangular coordinate aXes in response to input signals proportional to the polar coordinates of the point with respect to an initial origin at the intersection of a pair of initial coordinate axes and the distance between said origins, one of the coordinate axes in each of said pairs extending through each of said origins and thereby being common, the combination comprising: first means responsive to only the input signals for producing a first reference signal proportional to one of the rectangular coordinates lof said point with respect to said translated rectangular coordinate axes, second means responsive only to two of said input `signals and to only one of the translated polar coordinates of said point for producing a second reference signal proportional to said one translated rectangular coordinate, and third means for comparing said first and second reference signals to produce an output signal proportional to said one translated polar coordinate.

13. In a coordinate translation system for producing an output voltage proportional to at least one of the translated polar coordinates Rl and 01 of a point with respect to an origin of translation at the intersection of a pair of translated rectangular -coordinate axes x1 and y1 in response to input signals proportional to the polar co- 13 ordinates R, 0 of the point with respect to an initial origin at the intersection of a pair of initial coordinate axes x, y and the distance Re between said origins, the x and x1 axes in each of said pairs extending through each of said origins and thereby being common, the combination comprising: first means responsive to only the input voltages `for producing -a first reference voltage proportional to one of the rectangular coordinates of said point with respect to said translated rectangular coordinate axes, second means responsive only to two of said input voltages and to only one of the translated polar coordinates of said point for producing a second reference voltage proportional to said one translated rectangular coordinate, and third means for comparing said 'rst and second reference voltages to produce an output voltage proportional Ito said one translated polar coordinate.

14. The invention as defined in claim 13, wherein said third Ymeans includes fourth means to subtract one of said reference voltages from the other and a high gain amplier responsive to the output of said .fourth means for both producing said output voltage and impressing it upon 10 said second means.

No references cited.

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Pai-,ent No, 3,017,105 January "le, 1962 Alvin Guy Van Alstyne et al.,

It is hereby certified that error appears in the above numbered patent requiring correction and that the said Letters Patent should read as corrected below.

Column l, line 39, for "aircraf's" read '-N- aireraftqs column 2, line 48, after "provide" insert an column 3, line 4I, the formula should appear as shown below instead of as in the patent:

IO, lines 68 to 69, the formula should appear as shown below instead of as in the patent:

liza Biag 2 2 l column ll, lines 28 and 29, the :formula should appear .as shown below instead of as in the patent:

(SEAL) Attest:

ERNEST W. SWIDER Attesting Officer DAVID L. LADD YCommissioner of Patents 

